DocumentCode
1341002
Title
Window-based cell scheduling algorithm for VLSI implementation of an input-queued ATM switch
Author
Santhanam, A. ; Karandikar, A.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., Bombay, India
Volume
147
Issue
2
fYear
2000
fDate
4/1/2000 12:00:00 AM
Firstpage
119
Lastpage
122
Abstract
A method for providing bandwidth reservations in an input-buffered self-routing crossbar switch architecture is introduced and analysed. The scheme computes a conflict-free set of flows within a cell slot and achieves a link utilisation as high as 93%, for uniform random bursty traffic. Simulations of the proposed algorithm have been performed for different window sizes (W=1, 2, 4, 8) and the cell loss probability (CLP), cell waiting time (CWT) and system throughput (ST) are estimated. The VLSI implementation of the scheme is also described
Keywords
VLSI; asynchronous transfer mode; bandwidth allocation; queueing theory; scheduling; telecommunication traffic; VLSI implementation; bandwidth reservation; cell loss probability; cell waiting time; input-buffered self-routing crossbar switch architecture; input-queued ATM switch; link utilisation; system throughput; uniform random bursty traffic; window-based cell scheduling algorithm;
fLanguage
English
Journal_Title
Communications, IEE Proceedings-
Publisher
iet
ISSN
1350-2425
Type
jour
DOI
10.1049/ip-com:20000147
Filename
844482
Link To Document