DocumentCode
1341095
Title
Fast High-Accuracy Binary Parallel Addition
Author
Hendrickson, Herbert C.
Author_Institution
Aeronutronic Division of Ford Motor Co., Newport Beach, Calif.
Issue
4
fYear
1960
Firstpage
465
Lastpage
469
Abstract
Future designs of parallel digital computers will be concerned with increased accuracy in arithmetic operations. When the number of bits per operand is increased, one basic speed limitation to these operations is the time required to propagate carries in addition or borrows in subtraction. A quantitative method of evaluating the drastic reduction in time achieved by asynchronous addition techniques is described.
Keywords
Bismuth; Concurrent computing; Costs; Delay effects; Digital arithmetic; Equations; Helium; Logic testing; Registers; Signal resolution;
fLanguage
English
Journal_Title
Electronic Computers, IRE Transactions on
Publisher
ieee
ISSN
0367-9950
Type
jour
DOI
10.1109/TEC.1960.5219886
Filename
5219886
Link To Document