DocumentCode
1341352
Title
Device and Architecture Outlook for Beyond CMOS Switches
Author
Bernstein, Kerry ; Cavin, Ralph K. ; Porod, Wolfgang ; Seabaugh, Alan ; Welser, Jeff
Author_Institution
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
Volume
98
Issue
12
fYear
2010
Firstpage
2169
Lastpage
2184
Abstract
Sooner or later, fundamental limitations destine complementary metal-oxide-semiconductor (CMOS) scaling to a conclusion. A number of unique switches have been proposed as replacements, many of which do not even use electron charge as the state variable. Instead, these nanoscale structures pass tokens in the spin, excitonic, photonic, magnetic, quantum, or even heat domains. Emergent physical behaviors and idiosyncrasies of these novel switches can complement the execution of specific algorithms or workloads by enabling quite unique architectures. Ultimately, exploiting these unusual responses will extend throughput in high-performance computing. Alternative tokens also require new transport mechanisms to replace the conventional chip wire interconnect schemes of charge-based computing. New intrinsic limits to scaling in post-CMOS technologies are likely to be bounded ultimately by thermodynamic entropy and Shannon noise.
Keywords
CMOS integrated circuits; switches; Shannon noise; beyond CMOS switches; charge-based computing; complementary metal-oxide-semiconductor; high-performance computing; nanoscale structures; thermodynamic entropy; CMOS integrated circuits; CMOS technology; Computer architecture; FETs; Logic gates; Magnetic domains; Performance evaluation; Nanoarchitectures; nanomagnet logic; post-complementary metal–oxide–semiconductor (CMOS); pseudospin; quantum-dot cellular automata; quantum-dot cellular-automata architectures (QCAs); spin; tunnel field-effect transistor (TFET); tunneling;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/JPROC.2010.2066530
Filename
5593862
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