Title :
DARA: A Low-Cost Reliable Architecture Based on Unhardened Devices and Its Case Study of Radiation Stress Test
Author :
Yao, Jun ; Okada, Shogo ; Masuda, Masaki ; Kobayashi, Kazutoshi ; Nakashima, Yasuhiko
Author_Institution :
Grad. Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Nara, Japan
Abstract :
A microprocessor with an architectural redundancy to achieve high dependability is designed and manufactured to explore the effectiveness of tolerating soft errors without circuit hardening. The processor architecture is based on a modularized pipeline which contains several functionalities to facilitate a real-time error detection and a fast roll-back recovery. As a further extension for a possible increase of hard errors in the future technology, an energy-effective coverage of hard errors by dynamically adapting the redundancy between a dual and a triple module is also included in the processor. A radiation stress test result indicates that the designed redundant but unhardened processor can successfully achieve the same dependability as a hardened processor. Our synthesis and layout results show that radiation hardened circuits increase processor hardware area by 71% and power by 28%, respectively. It is thus possible to use the architectural redundancy instead of circuit hardening to achieve a cost-effective reliability, as suggested by these factors.
Keywords :
fault tolerance; microprocessor chips; radiation hardening (electronics); redundancy; DARA; architectural redundancy; cost-effective reliability; energy-effective coverage; fast roll-back recovery; fault tolerance; low-cost reliable architecture; microprocessor; modularized pipeline; processor architecture; radiation hardened circuits; radiation stress test; real-time error detection; unhardened devices; unhardened processor; Fault tolerance; Radiation hardening; Redundancy; Fault tolerance; radiation hardening; redundancy;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2012.2223715