Hardware-in-the-Loop Simulation of Power Electronic Systems Using Adaptive Discretization

This paper presents the hardware-in-the-loop (HIL) simulation of power electronic systems using a unique adaptive discretization technique based on the input of the system, where the coefficient matrices and system equations are changed while the simulation is running. The voltage-source-converter (VSC)-based HVDC system is used as a case study. Two z-transform-based discretization techniques, known as the step-invariant transformation (SIT) and the ramp-invariant transformation, and one of their derivative time-shifted SIT are applied for simulating the VSC-HVDC system. Discrete switching synchronization algorithms are used to accommodate the asynchronous events that take place in between two discrete simulation points. The HIL simulation is implemented using an off-the-shelf PC cluster interfaced with a digital controller. The simulator and the controller are connected through I/O ports, which facilitate the exchange of analog and digital signals. A 4-kW VSC-HVDC experimental setup is used to validate the simulation results, using the same digital controller as that in the HIL simulation to supply the necessary gate pulses for the experimental VSCs. A comparative study of the results obtained through offline, HIL simulation, and the experiment is presented.