• DocumentCode
    1342489
  • Title

    On-Chip Clocking of Nanomagnet Logic Lines and Gates

  • Author

    Alam, Mohammad Tanvir ; Kurtz, Steven J. ; Siddiq, Mohammad Abu Jafar ; Niemier, Michael T. ; Bernstein, Gary H. ; Hu, Xiaobo Sharon ; Porod, Wolfgang

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Notre Dame, Notre Dame, IN, USA
  • Volume
    11
  • Issue
    2
  • fYear
    2012
  • fDate
    3/1/2012 12:00:00 AM
  • Firstpage
    273
  • Lastpage
    286
  • Abstract
    The nanomagnet logic (NML) devices considered here are variants of proposed components for the edge-driven, quantum-dot cellular automata device architecture, where the position of electrons on quantum dots was suggested as a mechanism for representing binary state. To control NML circuit components (e.g., gates and lines), to date, externally generated magnetic fields have served as a clock. The clock is used to make the magnets in a circuit ensemble transition to a metastable state, so fringing fields from individual devices can set the state of a neighboring device in accordance with a new input. However, such a clocking scheme is obviously not extensible to chip-level systems. For NML to be a viable candidate for digital systems, a mechanism for simultaneously modulating the energy barriers of a group of devices must be implemented “on-chip,” and guarantee unidirectional dataflow from circuit input to circuit output. We have experimentally demonstrated a CMOS-compatible clock, and used it to reevaluate all of the NML constructs required for a functionally complete logic set. All possible input combinations to said constructs were successfully considered. Experiments were designed to promote unidirectional dataflow.
  • Keywords
    CMOS logic circuits; clocks; logic gates; magnetic fields; nanoelectronics; semiconductor quantum dots; CMOS-compatible clock; NML circuit components; NML devices; chip-level systems; circuit input; circuit output; digital systems; energy barriers; guarantee unidirectional dataflow; magnetic fields; nanomagnet logic gates; nanomagnet logic lines; neighboring device; on-chip clocking; quantum-dot cellular automata device architecture; Clocks; Copper; Logic gates; Magnetic fields; Magnetic flux; Magnetic resonance imaging; Wires; Magnetic circuits; magnetic logic; magnetic simulation;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2011.2169983
  • Filename
    6035985