Signal/Power Integrity Analysis for Multilayer Printed Circuit Boards Using Cascaded S-Parameters

A cascaded S-parameter method is proposed in this paper for signal/power integrity analysis of multiple vias in a multilayer printed circuit board (PCB). The proposed method enables efficient and accurate construction and simulation of physics-based via model for complex multilayer PCB structures involving vias. The physics-based via model describes the parasitic effects near each via region as well as mutual coupling among different vias. In this model, each via portion between two parallel plates is regarded as a three-port network with two coaxial ports and one radial port between the two plates. A procedure is first developed to obtain the S-parameters of a single plate pair, which combine the three-port via networks with the impedance matrix of the parallel-plate pair. Once the S-parameters of each plate pair are obtained, an assembling technique for cascading microwave networks is further developed. The method proposed in this paper has been validated by both simulations with a commercial circuit simulator and measurements.