• DocumentCode
    1342765
  • Title

    A 2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip

  • Author

    Carlough, Steven R. ; Philhower, Robert A. ; Maier, Cliff A. ; Steidl, Samuel A. ; Campbell, Peter M. ; Garg, Atul ; Nah, Kyung-Suc ; Ernest, Matthew W. ; Loy, James R. ; Krawczyk, Thomas W., Jr. ; Curran, Peter F. ; Kraft, Russel P. ; Greub, Hans J. ; Mc

  • Author_Institution
    Rensselaer Polytech. Inst., Troy, NY, USA
  • Volume
    35
  • Issue
    6
  • fYear
    2000
  • fDate
    6/1/2000 12:00:00 AM
  • Firstpage
    885
  • Lastpage
    894
  • Abstract
    A byte-slice datapath for exploring multi-chip RISC processor development in AlGaAs-GaAs heterojunction bipolar transistor (HBT) technology has been designed, fabricated and tested. The circuits are implemented using differential current-mode logic (CML) and emitter-coupled logic (ECL) with signal swings of 250 mV. Each datapath chip contains a single slice, including an 8-bit by 32-word single-port register file with a 230-ps read access time, and an 8-bit carry-select adder with a 140-ps select path and a 380-ps ripple-carry path. Each unpackaged die was tested using an at-speed boundary scan test scheme. The register file and adder carry chain are also implemented in a special test chip for accurate performance characterization of these critical circuits.
  • Keywords
    III-V semiconductors; aluminium compounds; bipolar digital integrated circuits; current-mode logic; emitter-coupled logic; gallium arsenide; heterojunction bipolar transistors; microprocessor chips; reduced instruction set computing; very high speed integrated circuits; 140 to 380 ps; 2 GHz; 8 bit; AlGaAs-GaAs; AlGaAs/GaAs HBT technology; ECL; adder carry chain; at-speed boundary scan test scheme; carry-select adder; clocked byte-slice datapath chip; differential CML; differential current-mode logic; emitter-coupled logic; heterojunction bipolar transistor technology; multi-chip RISC processor development; performance characterization; single-port register file; Adders; Circuit testing; Clocks; Gallium arsenide; Heterojunction bipolar transistors; Integrated circuit technology; Logic circuits; Process design; Reduced instruction set computing; Registers;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.845192
  • Filename
    845192