DocumentCode :
1343591
Title :
Physical and Electrical Performance Limits of High-Speed SiGeC HBTs—Part I: Vertical Scaling
Author :
Schröter, Michael ; Wedel, Gerald ; Heinemann, Bernd ; Jungemann, Christoph ; Krause, Julia ; Chevalier, Pascal ; Chantre, Alain
Author_Institution :
Dept. of Electr. Eng. & Inf. Technol., Tech. Univ. Dresden, Dresden, Germany
Volume :
58
Issue :
11
fYear :
2011
Firstpage :
3687
Lastpage :
3696
Abstract :
The overall purpose of this paper (including Part I, in this issue) is the prediction of the ultimate electrical high-frequency performance potential for SiGeC heterojunction bipolar transistors under the constraints of practical applications. This goal is achieved by utilizing most advanced device simulation tools with parameters calibrated to existing experimental results. This Part I outlines the overall scaling procedure and then focuses on the vertically scaled structure. According to isothermal device simulation, the “ultimate” doping profile yields a peak transit frequency fT of almost 1.5 THz, a BVCEO above 1 V (dependent on BE bias) and a zero-bias internal base sheet resistance of about 3 kΩ/sq. The reasons for achieving a higher product fTBVCEO(>; 1.5 THzV) than anticipated from the classical Johnson limit are explained. Finally, it is found that fT is limited by the minority charge stored in the BE junction and that BVCEO is mainly determined by the tunneling mechanisms in the base-collector space-charge region.
Keywords :
doping profiles; germanium compounds; heterojunction bipolar transistors; semiconductor device models; silicon compounds; tunnelling; BE junction; BVCEO; SiGeC; base-collector space-charge region; classical Johnson limit; device simulation tools; electrical performance limits; heterojunction bipolar transistors; high-speed HBT; isothermal device simulation; peak transit frequency; physical performance limits; tunneling mechanisms; ultimate doping profile; ultimate electrical high-frequency performance potential; vertical scaling; vertically scaled structure; zero-bias internal base sheet resistance; Capacitance; Doping; High definition video; Performance evaluation; Semiconductor process modeling; Silicon germanium; Tunneling; Device scaling; SiGeC heterojunction bipolar transistor (HBT); device simulation; high-performance bipolar technology; physical limits;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2163722
Filename :
6036169
Link To Document :
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