Title :
A 4-Channel 1.25–10.3 Gb/s Backplane Transceiver Macro With 35 dB Equalizer and Sign-Based Zero-Forcing Adaptive Control
Author :
Hidaka, Yasuo ; Gai, Weixin ; Horie, Takeshi ; Jian Hong Jiang ; Koyanagi, Yoichi ; Osone, Hideki
Author_Institution :
Fujitsu Labs. of America, Sunnyvale, CA, USA
Abstract :
A 4-channel 1.25-10.3 Gb/s backplane transceiver macro with an adaptive analog linear equalizer (LE) and 1-tap speculative decision-feedback equalizer (DFE) receiver (Rx) and a 3-tap pre-emphasis transmitter (Tx) is presented. The equalizers cancel 15.7-35.8 dB loss at the half-rate frequency for 10.3 Gb/s transmission over 5-75 cm FR4 backplane with fixed Tx parameters. Rx equalizer parameters are adapted by sign-based zero-forcing (S-ZF), which is applicable to any LE circuit and implemented in simple logic. The adaptive control circuit has a pattern-tolerant feature which prevents the adapted equalizer parameters from drifting for non-random data. The macro is fabricated in 90 nm CMOS technology. A Tx/Rx pair occupies 0.380 mm2 and consumes 260 mW from 1.2 V at 10.3 Gb/s per channel.
Keywords :
CMOS integrated circuits; adaptive control; decision feedback equalisers; transceivers; 1-tap speculative decision-feedback equalizer receiver; 3-tap pre-emphasis transmitter; 4-channel backplane transceiver macro; CMOS technology; FR4 backplane; adaptive analog linear equalizer; bit rate 1.25 Gbit/s to 10.3 Gbit/s; loss 15.7 dB to 35.8 dB; noise figure 35 dB; pattern-tolerant feature; power 260 mW; sign-based zero-forcing adaptive control; size 5 cm to 75 cm; size 90 nm; voltage 1.2 V; Adaptive control; Backplanes; CMOS logic circuits; CMOS technology; Decision feedback equalizers; Frequency; Logic circuits; Propagation losses; Transceivers; Transmitters; Adaptive equalizer control; backplane transceiver; decision feedback equalizer; linear equalizer;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2009.2031021
