Title :
Low-swing on-chip signaling techniques: effectiveness and robustness
Author :
Zhang, Hui ; George, Varghese ; Rabaey, Jan M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
6/1/2000 12:00:00 AM
Abstract :
This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity. In addition, several new interface circuits presenting even more energy savings and better reliability are proposed. Some of these circuits not only reduce the interconnect swing, but also use very low supply voltages so as to obtain quadratic energy savings. The performance of each of the presented circuits is thoroughly examined using simulation on a benchmark interconnect circuit. Significant energy savings up to a factor of six have been observed.
Keywords :
CMOS logic circuits; integrated circuit design; integrated circuit interconnections; integrated circuit reliability; logic CAD; low-power electronics; benchmark interconnect circuit; energy efficiency; energy savings; interconnect swing; low-swing on-chip signaling techniques; on-chip interconnect schemes; quadratic energy savings; reliability; signal integrity; supply voltages; Benchmark testing; Circuit simulation; Circuit testing; Clocks; Driver circuits; Energy consumption; Energy efficiency; Integrated circuit interconnections; Robustness; Wires;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
