Title :
Integrated constant-fraction discriminator shaping techniques for the PHENIX lead-scintillator calorimeter
Author :
Jackson, R. Gentry ; Blalock, T. Vaughn ; Simpson, Michael L. ; Wintenberg, Alan L. ; Young, Glenn R.
Author_Institution :
Tennessee Univ., Knoxville, TN, USA
fDate :
6/1/1997 12:00:00 AM
Abstract :
The suitability of several on-chip constant-fraction discriminator (CFD) shaping methods for use in the multichannel PHENIX Lead-Scintillator detector has been investigated. Three CFD circuits utilizing a distributed R-C delay-line, a lumped-element R-C delay-line, and the Nowlin shaping method have been realized in a standard 1.2-μ n-well CMOS process. A CFD using ideal delay-line shaping was also studied for comparison. Time walk for 5 ns risetime input signals over a dynamic range of -2 V to -20 mV was less than ±175 ps, ±150 ps, ±150, and ±185 ps while worst case rms timing jitter measured 85 ps, 90 ps, 100 ps, and 65 ps, respectively, for the four methods mentioned above. Area requirements for the three candidate methods tested including the fraction circuit were 172 μ×70 μ, 160 μ×65 μ, and 179 μ×53 μ, respectively. The fraction circuit area for the external delay-line circuit was 67 μ×65 ×μ. Each shaping method studied consumed no power from the dc supply
Keywords :
CMOS integrated circuits; RC circuits; delay lines; detector circuits; discriminators; jitter; mixed analogue-digital integrated circuits; nuclear electronics; pulse shaping circuits; solid scintillation detectors; timing circuits; -20 mV to -2 V; 1.2 mum; 5 ns; 65 to 75 ps; CMOS; Nowlin shaping method; PHENIX Pb scintillator calorimeter; constant-fraction discriminator; delay-line shaping; distributed R-C delay-line; fraction circuit area; lumped-element R-C delay-line; rms timing jitter; time walk; Circuit testing; Computational fluid dynamics; Delay; Detectors; Dynamic range; Integrated circuit measurements; Laboratories; Noise shaping; Time measurement; Timing jitter;
Journal_Title :
Nuclear Science, IEEE Transactions on