Title :
Comment on Lapp & Powers Fault Tree
Author :
Taylor, J. Robert
Author_Institution :
Riso National Laboratory; Electronics Department; DK-4000 Roskilde DENMARK.
fDate :
6/1/1979 12:00:00 AM
Keywords :
Fault trees; Feedback loop; Laboratories; Logic; Signal synthesis; Steady-state; Valves; Cause consequence chart; Fault tree; Lapp & Powers fault tree; XOR gate;
Journal_Title :
Reliability, IEEE Transactions on
DOI :
10.1109/TR.1979.5220513