The STAR DAQ receiver board

Author

LeVine, M.J. ; Ljubicic, A., Jr. ; Schulz, M.W. ; Scheetz, R. ; Consiglio, C. ; Padrazo, D. ; Zhao, Y.

Author_Institution

Brookhaven Nat. Lab., Upton, NY, USA

Volume

47

Issue

2

fYear

2000

fDate

4/1/2000 12:00:00 AM

Firstpage

127

Lastpage

131

Abstract

Data digitized on the STAR TPC detector are transmitted via 1.5 Gbit/sec optical fiber to the DAQ receiver boards (RB) located in Sector VME crates. The RE contains the optical receiver, Glink decoder, high speed bus to deliver data to three Mezzanines, which perform the processing. The RE back end provides an interface between VME64 and PCI, serving as interconnect between all of the Mezzanines, the VME bus, and resources local to the receiver board. Each Mezzanine hosts an Intel I960HD superscalar RISC CPU, which performs 2-dimensional cluster-finding and data formatting. Dual-ported VRAM provide storage for 12 TPC events. Incoming data are processed in real time by a bank of ASICs which perform pedestal subtraction, 10-bit to 8-bit compression via table lookup, and compilation of a sequence pointer bank for use by the CPU during cluster-finding. Communication among the I960s and the master CPU in the VME crate takes place through mailboxes and doorbells implemented in the I960-PCI bridge chips

Keywords

data acquisition; nuclear electronics; optical fibre communication; system buses; time projection chambers; DAQ receiver boards; Glink decoder; Intel I960HD superscalar RISC CPU; Mezzanines; STAR DAQ receiver board; STAR time projection chamber; VME crates; data formatting; optical receiver; pedestal subtraction; sequence pointer bank; table lookup; two-dimensional cluster-finding; Connectors; Data acquisition; Decoding; Detectors; Laboratories; Optical buffering; Optical fibers; Optical receivers; Reduced instruction set computing; SDRAM;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.846131

Filename

846131