Title :
A PMC based ADC card for CMS tracker readout
Author :
Baird, S.A. ; Coughlan, J.A. ; Halsall, R. ; Hartley, J. ; Haynes, W.J. ; Parthipan, T.
Author_Institution :
CLRC, Rutherford Appleton Lab., Chilton, UK
fDate :
4/1/2000 12:00:00 AM
Abstract :
The tracking system of the CMS detector at the LHC employs Front End Driver (FED) cards to digitise, buffer and sparsify analogue data arriving via optical links from on detector pipeline chips. This paper describes a prototype version of the FED based upon the popular commercial PCI bus Mezzanine Card (PMC) form factor. The FED-PMC consists of an 8 channel, 9 bit ADC, card, providing a 1 MByte data buffer and operating at the LHC design frequency of 40 MHz. The core of the card is a re-programmable FPGA which allows the functionality of the card to be conveniently modified. The card is supplied with a comprehensive library of C routines. The PMC form factor allows the card to be plugged onto a wide variety of processor carrier boards and even directly into PCI based PCs. The flexibility of the FPGA based design permits the card to be used in a variety of ADC based applications
Keywords :
analogue-digital conversion; field programmable gate arrays; nuclear electronics; readout electronics; silicon radiation detectors; C routines; CMS detector; CMS tracker readout; FPGA based design; Front End Driver cards; LHC; PMC based ADC card; Si; analogue data; on detector pipeline chips; optical links; popular commercial PCI bus Mezzanine Card form factor; processor carrier boards; Collision mitigation; Computer buffers; Field programmable gate arrays; Frequency; Large Hadron Collider; Libraries; Optical buffering; Optical fiber communication; Pipelines; Prototypes;
Journal_Title :
Nuclear Science, IEEE Transactions on
