• DocumentCode
    1344752
  • Title

    The on-line computational and control system for the 4π-detector CHIMERA

  • Author

    Aiello, S. ; Alderighi, M. ; Anzalone, A. ; Bartolucci, M. ; Cardella, G. ; Cavallaro, S. ; De Filippo, E. ; Feminò, S. ; Geraci, E. ; Geraci, M. ; Giustolisi, F. ; Greco, A. ; Guazzoni, P. ; IaconoManno, C.M. ; Lanzalone, G. ; Lanzanò, G. ; LoNigro, S. ;

  • Author_Institution
    Ist. Nazionale di Fisica Nucl., Catania, Italy
  • Volume
    47
  • Issue
    2
  • fYear
    2000
  • fDate
    4/1/2000 12:00:00 AM
  • Firstpage
    196
  • Lastpage
    200
  • Abstract
    A commercial two-DSP-based board is the basic unit of the on-line computational and control system under development for the multidetector array CHIMERA. The system design includes a small scale parallel and distributed architecture of PCs and DSP boards. The PCs are used both as host computer and interface between user and network. Each PC can host up to three DSP boards. The system is able to accomplish the on-beam control of CHIMERA, by means of the on-line computation of special algorithms, instead of using the usual techniques of special pulses to be sent off-beam. The physical data, collected and organized in UDP packets by the data acquisition system, are read through a 10 Mbit/s Ethernet network. The PC software, running under Windows NT 4.0, is based on threads and assures the communication and program managing as well as the result presentation. The DSP-software is written in C++ and takes care of the communication with the PC and of the computation of algorithms. The preliminary on beam results for the first three wheels (about 100 telescopes), obtained by employing two biprocessor boards located in the PCI bus of a Pentium MMX PC, are also presented
  • Keywords
    data acquisition; distributed processing; high energy physics instrumentation computing; local area networks; microcomputer applications; silicon radiation detectors; solid scintillation detectors; CHIMERA; CsI:Tl; Ethernet network; PC software; Si; biprocessor boards; commercial two-DSP-based board; data acquisition system; distributed architecture; host computer; multidetector array; on-beam control; Computer architecture; Computer interfaces; Computer networks; Control systems; Data acquisition; Digital signal processing; Ethernet networks; Personal communication networks; Wheels; Yarn;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.846146
  • Filename
    846146