DocumentCode :
134515
Title :
Hardware implementation of fast-sequency ordered complex hadamard transform
Author :
Qadri, Syed Safi Uddin ; Azim, Choudhry Fahad ; Hazry, D. ; Ahmed, S. Faiz ; Joyo, M. Kamran ; Taveer, M. Hassan ; Warsi, Faizan A.
Author_Institution :
Hamdard Univ., Karachi, Pakistan
fYear :
2014
fDate :
7-9 March 2014
Firstpage :
106
Lastpage :
110
Abstract :
In this article hardware implementation of Sequency ordered Complex Hadamard Transform (SCHT) on FPGA is presented. SCHT is quite similar to Discrete Fourier Transform (DFT) but it consumes less computational time. DFT is replaceable by SCHT in several applications such as Communication, Spectrum analysis and estimation, Signal processing and image watermarking. The 8-point radix-2 fast SCHT is evaluated on FPGA to minimize its computational time, besides that certain parameters of fast SCHT matrices are analysed. Finally SCHT hardware implemented results and MATLAB simulated results are compared at the cost of time to verify the effectiveness of the SCHT on FPGA.
Keywords :
Hadamard matrices; Hadamard transforms; discrete Fourier transforms; field programmable gate arrays; 8-point radix-2 fast SCHT; DFT; FPGA; MATLAB; discrete Fourier transform; fast SCHT matrix; fast-sequency ordered complex Hadamard transform; hardware implementation; image watermarking; signal processing; spectrum analysis; spectrum estimation; Discrete Fourier transforms; Field programmable gate arrays; Hardware; MATLAB; Signal processing; Signal processing algorithms; CDMA; DFT; FPGA; MATLAB; SCHT;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing & its Applications (CSPA), 2014 IEEE 10th International Colloquium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4799-3090-6
Type :
conf
DOI :
10.1109/CSPA.2014.6805730
Filename :
6805730
Link To Document :
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