Title :
A second-order double-sampled delta-sigma modulator using individual-level averaging
Author :
Thanh, Chuc K. ; Lewis, Stephen H. ; Hurst, Paul J.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fDate :
8/1/1997 12:00:00 AM
Abstract :
A second-order double-sampled delta-sigma modulator is described. It uses all individual-level-averaging switching scheme to convert capacitor mismatch into high-pass noise. With a sampling rate of 25 MHz and an oversampling ratio of 128, the maximum measured signal-to-noise-and-distortion ratio is 82.2 dB, and the total harmonic distortion is -91.0 dB when the input is 2.5 dB below full scale. The modulator is fully differential, occupies 3.75 mm2 in a 1.2-μm CMOS process, and dissipates 25.9 mW (10.2 mW analog and 15.7 mW digital)
Keywords :
CMOS integrated circuits; sigma-delta modulation; 1.2 micron; 25 MHz; 25.9 mW; CMOS chip; capacitor mismatch; differential circuit; double sampling; high-pass noise; individual-level averaging; oversampling ratio; sampling rate; second-order delta-sigma modulator; signal-to-noise-and-distortion ratio; total harmonic distortion; Baseband; Capacitance; Capacitors; Clocks; Delta modulation; Feedback; Operational amplifiers; Sampling methods; Solid state circuits; Switches;
Journal_Title :
Solid-State Circuits, IEEE Journal of
