DocumentCode :
1346499
Title :
On minimizing the lengths of checking sequences
Author :
Ural, Hasan ; Wu, Xiaolin ; Zhang, Fan
Author_Institution :
Dept. of Comput. Sci., Ottawa Univ., Ont., Canada
Volume :
46
Issue :
1
fYear :
1997
fDate :
1/1/1997 12:00:00 AM
Firstpage :
93
Lastpage :
99
Abstract :
A general model for constructing minimal length checking sequences employing a distinguishing sequence is proposed. The model is based on characteristics of checking sequences and a set of state recognition sequences. Some existing methods are shown to be special cases of the proposed model and are proven to construct checking sequences. The minimality of the resulting checking sequences is discussed and a heuristic algorithm for the construction of minimal length checking sequences is given
Keywords :
fault location; finite state machines; heuristic programming; logic design; distinguishing sequence; heuristic algorithm; minimal length checking sequences; state recognition sequences; Character recognition; Circuit testing; Fault detection; Heuristic algorithms; Pattern analysis; Protocols; Sequential analysis; Switching systems; System testing; Telephony;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.559807
Filename :
559807
Link To Document :
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