Title :
A phase-interpolation direct digital synthesizer with an adaptive integrator
Author :
Yamagishi, Akihiro ; Nosaka, Hideyuki ; Muraguchi, Masahiro ; Tsukahara, Tsuneo
Author_Institution :
NTT Telecommun. Energy Labs., Kanagawa, Japan
fDate :
6/1/2000 12:00:00 AM
Abstract :
A phase-interpolation direct digital synthesizer (DDS) with an adaptive integrator is described in this paper. Unlike a conventional DDS, it does not use ROM or a D/A converter. Therefore, less power is dissipated and the maximum speed is increased. The delay time for phase interpolation is generated by the adaptive integrator, which is composed of a capacitance switch array and current switch array, and by a comparator with constant threshold voltage. The DDS was fabricated on 0.5-μm CMOS process technology. The spurious level is lower than -50 dBc and the power dissipation is 60 mW at a clock frequency of 40 MHz and output frequency of about 19 MHz
Keywords :
CMOS digital integrated circuits; code division multiple access; comparators (circuits); delays; direct digital synthesis; frequency hop communication; integrating circuits; interpolation; low-power electronics; mobile communication; 0.5 micron; 19 MHz; 40 MHz; 60 mW; CMOS process technology; adaptive integrator; capacitance switch array; clock frequency; comparator; constant threshold voltage; current switch array; delay time; low-power electronics; output frequency; phase-interpolation direct digital synthesizer; power dissipation; spurious level; Adaptive arrays; Capacitance; Delay effects; Frequency; Interpolation; Phased arrays; Read only memory; Switches; Synthesizers; Threshold voltage;
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
