DocumentCode :
1346650
Title :
Practical MTR-FDTS (τ=2) read channel for the >200 Mbit/sec Era
Author :
Kovacs, Janos ; Byrne, Jason ; Kenney, Jack
Author_Institution :
Analog Devices Inc., Wilmington, MA, USA
Volume :
34
Issue :
1
fYear :
1998
fDate :
1/1/1998 12:00:00 AM
Firstpage :
118
Lastpage :
123
Abstract :
This paper presents an architecture for a fixed-delay tree search with feedback (FDTS/DF) channel which uses a maximum transition run-length code. The critical timing path in this new detector is comparable to that of a decision feedback detector. The forward filter consists of a first-order all-pass filter cascaded with a fourth-order Bessel filter. Timing and gain recovery are also discussed
Keywords :
all-pass filters; automatic gain control; cascade networks; digital magnetic recording; feedback; magnetic recording noise; maximum likelihood detection; partial response channels; runlength codes; timing; tree searching; 200 Mbit/s; AGC loop; EPR4 channels; FDTS/DF channel; PR4 channels; cascade filter; critical timing path; first-order all-pass filter; fixed-delay tree search with feedback channel; forward filter; fourth-order Bessel filter; gain recovery; high performance read channel; maximum transition run-length code; timing recovery; Decision trees; Detectors; Equalizers; Feedback; Filters; Intersymbol interference; Maximum likelihood detection; Noise cancellation; Noise level; Tail;
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/20.663480
Filename :
663480
Link To Document :
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