High-order vector sigma-delta modulators

An attractive technique, useful for the implementation of multibit sigma-delta (ΣΔ) converters, is the spectral shaping of the unknown errors introduced by the analog circuitry of the digital-to-analog conversion (DAC). This is achieved by encoding the multibit ΣΔ sequence of the modulator output to an array of single-bit ΣΔ sequences. In this paper, it is shown how a multibit ΣΔ converter can be implemented directly using an array of M joint single-bit ΣΔ modulators, the vector ΣΔ modulator (VΣΔM). A model for stability and performance analysis of high-order VΣΔM is proposed. It is shown how the structure of the VΣΔM is modified in order to encode a PCM signal to an array of single-bit ΣΔ sequences. Simulations are carried out in order to show the successful operation of high-order VΣΔM´s, and check the validity of the proposed model