Title :
A learning multiple-valued logic network: algebra, algorithm, and applications
Author :
Tang, Zheng ; Cao, Qi-ping ; Ishizuka, Okihiko
Author_Institution :
Fac. of Eng., Miyazaki Univ., Japan
fDate :
2/1/1998 12:00:00 AM
Abstract :
We propose a multiple valued logic (MVL) network with functional completeness and develop its learning capability. The MVL network consists of layered arithmetic piecewise linear processors. Since the arithmetic operations of the network are basically a wired sum and a piecewise linear operation, their implementations should be rather simple and straightforward. Furthermore, the MVL network can be trained by the traditional backpropagation algorithm directly. The algorithm trains the networks using examples and appears to be available for most MVL problems of interest
Keywords :
backpropagation; multivalued logic; multivalued logic circuits; piecewise-linear techniques; MVL network; arithmetic operations; backpropagation algorithm; functional completeness; layered arithmetic piecewise linear processors; learning capability; learning multiple valued logic network; piecewise linear operation; wired sum; Algebra; Arithmetic; Backpropagation algorithms; Image processing; Logic functions; Network synthesis; Piecewise linear techniques; Speech recognition; Speech synthesis; Training data;
Journal_Title :
Computers, IEEE Transactions on