Title :
High temperature formed SiGe p-MOSFETs with good device characteristics
Author :
Wu, Y.H. ; Chin, Albert
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
7/1/2000 12:00:00 AM
Abstract :
We have used a simple process to fabricate Si/sub 0.3/Ge/sub 0.7//Si p-MOSFETs. The Si/sub 0.3/Ge/sub 0.7/ is formed using deposited Ge followed by 950/spl deg/C rapid thermal annealing and solid phase epitaxy that is process compatible with existing VLSI. A hole mobility of 250 cm/sup 2//Vs is obtained from the Si/sub 0.3/Ge/sub 0.7/ p-MOSFET that is /spl sim/two times higher than Si control devices and results in a consequent substantially higher current drive. The 228 /spl Aring/ Si/sub 0.3/Ge/sub 0.7/ thermal oxide grown at 1000/spl deg/C has a high breakdown field of 15 MV/cm, low interface trap density (D/sub it/) of 1.5/spl times/10/sup 11/ eV/sup -1/ cm/sup -2/, and low oxide charge of 7.2/spl times/10/sup 10/ cm/sup -2/. The source-drain junction leakage after implantation and 950/spl deg/C RTA is also comparable with the Si counterpart.
Keywords :
Ge-Si alloys; MOSFET; elemental semiconductors; hole mobility; interface states; leakage currents; rapid thermal annealing; semiconductor materials; silicon; solid phase epitaxial growth; 1000 C; 228 A; 950 C; RTA; SPE; Si/sub 0.3/Ge/sub 0.7/-Si; Si/sub 0.3/Ge/sub 0.7//Si p-MOSFET; SiGe p-MOSFET; current drive; device characteristics; high temperature formed PMOSFET; hole mobility; interface trap density; p-channel MOSFET; rapid thermal annealing; solid phase epitaxy; source-drain junction leakage; thermal oxide; Electric breakdown; Epitaxial growth; Germanium silicon alloys; MOSFET circuits; Rapid thermal annealing; Rapid thermal processing; Silicon germanium; Solids; Temperature; Very large scale integration;
Journal_Title :
Electron Device Letters, IEEE
