Design and Fabrication of 0/1-Level RF-Via Interconnect for RF-MEMS Packaging Applications

Author

Hsu, Li-Han ; Wu, Wei-Cheng ; Chang, Edward Yi ; Zirath, Herbert ; Wu, Yun-Chi ; Wang, Chin-Te ; Lee, Ching-Ting

Author_Institution

Mater. Sci. & Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

33

Issue

1

fYear

2010

Firstpage

30

Lastpage

36

Abstract

This paper presents the parametric study of RF-via (0-level) and flip-chip bump (1-level) transitions for applications of packaging coplanar RF-MEMS devices. The key parameters were found to be the bumps´ and vias´ positions and the overlap of the metal pads, which should be carefully considered in the entire two levels of packages. The length of the backside transmission line, determining the MEMS substrate area, showed minor influence on the interconnect performance. With the experimental results, the design rules have been developed and established. The optimized interconnect structure for the two levels of packages demonstrates the return loss beyond 15 dB and the insertion loss within 0.6 dB from dc to 60 GHz.

Keywords

flip-chip devices; integrated circuit interconnections; micromechanical devices; packaging; transmission lines; 0/1-level RF-via interconnect; MEMS substrate area; RF-MEMS packaging; coplanar RF-MEMS devices; flip chip bump; metal pads; parametric study; transmission line; Fabrication; interconnections; microelectromechanical devices; microwave technology; packaging;

fLanguage

English

Journal_Title

Advanced Packaging, IEEE Transactions on

Publisher

ieee

ISSN

1521-3323

Type

jour

DOI

10.1109/TADVP.2009.2034137

Filename

5345704