Analysis of Reliability Block Diagrams by Boolean Techniques

A reliability block diagram for complex systems is often analyzed by applying the series/parallel product laws or, where this is not possible, by using a conditional probability result (Bayes theorem). In both cases, the analysis is conducted in the probabilistic domain and, for complex systems, is lengthy. An alternative method is to consider the component reliability parameters to be Boolean variables rather than probabilistic variables and to treat the whole problem as if it were Boolean. This has the advantage of allowing the use of powerful Boolean reduction theorems to contain the size of the problem. Unfortunately, much of this advantage is lost when conversion back into the probabilistic domain takes place. This paper presents a technique for overcoming this disadvantage; the technique is based on analysing and modifying the Boolean expression prior to the conversion process. The technique was originally developed as an aid to fault-tree analysis but it applies to general problems of reliability assessment. I claim no originality for the procedure. The motivation to write the paper is quite simple: the procedure is not as well-known as it should be either amongst practising reliability engineers or amongst those who teach the subject. The purpose of the paper is therefore tutorial.