Title :
Design methodologies for C-2C ladder-based D/A convertors for PCM codecs
Author :
Singh, S.P. ; Prabhaker, A. ; Bhattacharyya, A.B.
Author_Institution :
Central Labs R&D, Indian Telephone Ind. Ltd., Bangalore, India
fDate :
8/1/1988 12:00:00 AM
Abstract :
The paper is devoted to the analysis and design of C-2C ladder-based D/A convertors. First, it is shown that the conventional unit capacitor bottom plate parasitics result in unacceptability high (>0.5 LSB) nonlinearity of C-2C ladder D/A convertors. To this end, a unit capacitor C to proposed, which has linear floating bottom plate parasitics Cp. Two design approaches to `design in´ the linear parasitics are developed, one based on the assumption that Cp≪C and the other assuming C p/C=10%, culminating in 7-bit designs with nonlinearity as low as 0.095·LSB. These 7-bit designs are then extended to 13 bits, which are adequate for designing both A- and μ-law PCM codecs
Keywords :
codecs; digital-analogue conversion; ladder networks; network synthesis; pulse-code modulation; 13-bit designs; 7-bit designs; C-2C ladder-based D/A convertors; PCM codecs; design approaches; linear floating bottom plate parasitics; unit capacitor;
Journal_Title :
Electronic Circuits and Systems, IEE Proceedings G
