DocumentCode :
134905
Title :
CORDIC based reconfigurable architecture for DS-CDMA/CI transmitter
Author :
Kapoor, Rajan ; Sundar, S. Shyam ; Kumar, Preetam
Author_Institution :
Dept. of Electr. Eng., IIT Patna, Patna, India
fYear :
2014
fDate :
Feb. 28 2014-March 2 2014
Firstpage :
126
Lastpage :
131
Abstract :
The traditional model of DS-CDMA transmitter is not efficient when spreading codes are complex since complex multiplications needed for spreading would consume more power, require more area for implementation and incur more delays. In this paper, a novel architecture for DS-CDMA/CI transmitter is proposed which uses CORDIC algorithm to generate carrier whose phase offset is controlled by Carrier Interferometry (CI) codes. The architecture is based on the principle that product of two exponential is essentially an exponential with angle equal to sum of angle of product components. Furthermore, the architecture is reconfigurable in the sense that the spreading codes can be dynamically assigned during transmission and therefore can be used for designing communication systems for cognitive radio applications. The maximum frequency of operation was found to be 22 MHz from timing analysis results for given model for SPARTAN 3E FPGA.
Keywords :
code division multiple access; digital arithmetic; field programmable gate arrays; CORDIC based reconfigurable architecture; DS-CDMA/CI transmitter; SPARTAN 3E FPGA; carrier interferometry codes; cognitive radio applications; complex multiplications; maximum frequency; spreading codes; timing analysis; Convolutional codes; Generators; Mathematical model; Modulation; Multiaccess communication; Multiplexing; Radio transmitters; BPSK modulator; CORDIC; Convolutional Encoder; DS-CDMA/CI; FPGA;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Students' Technology Symposium (TechSym), 2014 IEEE
Conference_Location :
Kharagpur
Print_ISBN :
978-1-4799-2607-7
Type :
conf
DOI :
10.1109/TechSym.2014.6807927
Filename :
6807927
Link To Document :
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