Efficient formulation and model-order reduction for the transient simulation of three-dimensional VLSI interconnect

Accurately accounting for three-dimensional (3-D) geometry and distributed RC effects in on-chip interconnect is important for predicting crosstalk in memory cells, analog circuits, and regions of congested routing in digital circuits. In this paper we describe a multipole-accelerated, mixed surface-volume formulation, and a preconditioned model-order reduction algorithm for distributed RC, or electroquasistatic, simulation of 3-D integrated circuit interconnect. The difficulties arising from the ill conditioning inherent in the dynamic problem is effectively resolved by a combined surface-volume approach. Results are presented to demonstrate that the computational cost for extracting a complete reduced-order model is order N, where N is the number of surface unknowns. Finally, the multipole-accelerated code is used to investigate the accuracy of the one-dimensional diffusion equation for long RC lines