A Fully Integrated Multi-CPU, Processor Graphics, and Memory Controller 32-nm Processor

Author

Yuffe, Marcelo ; Mehalel, Moty ; Knoll, Ernest ; Shor, Joseph ; Kurts, Tsvika ; Altshuler, Eran ; Fayneh, Eyal ; Luria, Kosta ; Zelikson, Michael

Author_Institution

Intel Corp., Haifa, Israel

Volume

47

Issue

1

fYear

2012

Firstpage

194

Lastpage

205

Abstract

This paper describes the second-generation Intel Core processor, a 32-nm monolithic die integrating four IA cores, a processor graphics, and a memory controller. Special attention is given to the circuit design challenges associated with this kind of integration. The paper describes the chip floor plan, the power delivery network, energy conservation techniques, the clock generation and distribution, the on-die thermal sensors, and a novel debug port.

Keywords

energy conservation; integrated circuit design; integrated memory circuits; microprocessor chips; IA cores; chip floor plan; circuit design; clock distribution; clock generation; debug port; energy conservation techniques; memory controller processor; monolithic die; multi-CPU; on-die thermal sensors; power delivery network; processor graphics; second-generation Intel Core processor; size 32 nm; Graphics; Integrated circuit interconnections; Logic gates; Power dissipation; Power supplies; Process control; Transistors; Clocking; Intel second-generation core; low Vccmin; modularity; power gates; thermal sensors;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2011.2167814

Filename

6044730