DocumentCode
1349809
Title
Supply voltage scaling for temperature insensitive CMOS circuit operation
Author
Bellaouar, A. ; Fridi, A. ; Elmasry, M.I. ; Itoh, K.
Author_Institution
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume
45
Issue
3
fYear
1998
fDate
3/1/1998 12:00:00 AM
Firstpage
415
Lastpage
417
Abstract
CMOS supply voltage scaling for temperature independent gate delay is investigated. It is found that the optimum supply voltage which results in temperature insensitive operation is proportional to the threshold voltage. This voltage enables a single battery cell operation. CMOS technologies with 0.35- and 0.25-μm size features are used as examples in this study
Keywords
CMOS digital integrated circuits; VLSI; delays; integrated circuit design; 0.25 micron; 0.35 micron; digital circuits; feature size; gate delay; single battery cell operation; supply voltage scaling; temperature insensitive CMOS circuit; threshold voltage; Batteries; CMOS technology; Circuit simulation; Delay effects; Dynamic voltage scaling; Equations; Power dissipation; Power supplies; Temperature; Threshold voltage;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.664253
Filename
664253
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