• DocumentCode
    1349851
  • Title

    Comments on "A high speed realization of a residue to binary number system converter"

  • Author

    Dhurkadas, A.

  • Author_Institution
    Naval Phys. & Oceanogr. Lab., Cochin, India
  • Volume
    45
  • Issue
    3
  • fYear
    1998
  • fDate
    3/1/1998 12:00:00 AM
  • Firstpage
    446
  • Lastpage
    447
  • Abstract
    In the above paper [see ibid., p. 661-3, October 1995], a new residue to binary converter design based on the theory which uses four operand modular adder to compute the value of S* is described. An improvement in which computational simplification of X* and its realization using three operand modular adder is presented.
  • Keywords
    adders; residue number systems; binary number system; computational simplification; modular adder; number system converter; residue number system; Councils; Current measurement; Diodes; Equations; Fabrication; Neural networks; Semiconductor device measurement; Solid state circuits; Testing; Voltage;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.664260
  • Filename
    664260
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1349851