• DocumentCode
    1349924
  • Title

    Noise considerations in circuit optimization

  • Author

    Visweswariah, Chandu ; Haring, Ruud A. ; Conn, Andrew R.

  • Author_Institution
    Dept. of Comput. Archit. & Design. Autom., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • Volume
    19
  • Issue
    6
  • fYear
    2000
  • fDate
    6/1/2000 12:00:00 AM
  • Firstpage
    679
  • Lastpage
    690
  • Abstract
    Noise can cause digital circuits to switch incorrectly, producing spurious results. It can also have adverse power, timing and reliability effects. Dynamic logic is particularly susceptible to charge-sharing and coupling noise. Thus, the design and optimization of a circuit should take noise considerations into account. Such considerations are typically stated as semi-infinite constraints in the time-domain. Semi-infinite problems are generally harder to solve than standard nonlinear optimization problems. Moreover, the number of noise constraints can potentially be very large. This paper describes a novel and practical method for incorporating realistic noise considerations during automatic circuit optimization by representing semi-infinite constraints as ordinary equality constraints involving time integrals. Using an augmented Lagrangian optimization merit function, the adjoint method is applied to compute all the gradients required for optimization in a single adjoint analysis, no matter how many noise measurements are considered and irrespective of the dimensionality of the problem. Thus, for the first time, a method is described to practically accommodate a large number of noise considerations during circuit optimization. The technique has been applied to optimization using time-domain simulation, but could be applied in the future to optimization on a static-timing basis. Numerical results are presented
  • Keywords
    circuit optimisation; integrated circuit noise; integrated circuit reliability; logic CAD; time-domain analysis; timing; adjoint analysis; adjoint method; augmented Lagrangian optimization merit function; automatic circuit optimization; charge-sharing; coupling noise; dimensionality; dynamic logic; equality constraints; reliability effects; static-timing basis; time-domain simulation; Circuit noise; Circuit optimization; Coupling circuits; Digital circuits; Logic; Optimization methods; Switches; Switching circuits; Time domain analysis; Timing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.848089
  • Filename
    848089