Title :
InP DHBT selector-driver with 2 X 2.7 V swing for 100 Gbit/s operation
Author :
Konczykowska, Agnieszka ; Dupuy, Jean-Yves ; Jorge, Filipe ; Riet, M. ; Moulu, J. ; Godin, J.
Author_Institution :
III-V Lab., Alcatel-Thales III-V Lab., Marcoussis, France
Abstract :
An integrated selector-driver is designed for 100 Gbit/s operation and fabricated using 0.7 mum InP double-heterojunction bipolar transistor (DHBT) technology. The driver has a lumped architecture and operates in differential mode. Two complementary signals each with 2.7 V amplitude (3.2 Vpp) have been measured at 100 Gbit/s.
Keywords :
III-V semiconductors; driver circuits; heterojunction bipolar transistors; indium; integrated circuit design; phosphorus compounds; InP; InP DHBT selector-driver; bit rate 100 Gbit/s; complementary signal; differential mode operation; double-heterojunction bipolar transistor technology; lumped architecture; size 0.7 mum; voltage 2.7 V;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2009.2578
