• DocumentCode
    1350515
  • Title

    InP DHBT selector-driver with 2 X 2.7 V swing for 100 Gbit/s operation

  • Author

    Konczykowska, Agnieszka ; Dupuy, Jean-Yves ; Jorge, Filipe ; Riet, M. ; Moulu, J. ; Godin, J.

  • Author_Institution
    III-V Lab., Alcatel-Thales III-V Lab., Marcoussis, France
  • Volume
    45
  • Issue
    24
  • fYear
    2009
  • Firstpage
    1235
  • Lastpage
    1236
  • Abstract
    An integrated selector-driver is designed for 100 Gbit/s operation and fabricated using 0.7 mum InP double-heterojunction bipolar transistor (DHBT) technology. The driver has a lumped architecture and operates in differential mode. Two complementary signals each with 2.7 V amplitude (3.2 Vpp) have been measured at 100 Gbit/s.
  • Keywords
    III-V semiconductors; driver circuits; heterojunction bipolar transistors; indium; integrated circuit design; phosphorus compounds; InP; InP DHBT selector-driver; bit rate 100 Gbit/s; complementary signal; differential mode operation; double-heterojunction bipolar transistor technology; lumped architecture; size 0.7 mum; voltage 2.7 V;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2009.2578
  • Filename
    5349290
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1350515