Title :
Area-Efficient Multipliers Based on Multiple-Radix Representations
Author :
Dimitrov, Vassil S. ; Järvinen, Kimmo U. ; Adikari, Jithra
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
Abstract :
In this paper, we shall introduce several new algorithms for integer multiplication that are based on specific multiple-radix representation of one of the multiplicands. We provide extensive theoretical analysis and experimental results for multipliers based on the new representations on 0.18 μm CMOS technology. They provide a clear picture about the advantages of the new method in 64-bit hardware implementations compared to array-based classical multiplier and radix-8-based multiplier. The proposed multipliers have better area and power consumption compared to reference multipliers.
Keywords :
CMOS integrated circuits; power aware computing; 64 bit hardware implementations; CMOS technology; area efficient multipliers; integer multiplication; multiple radix representations; power consumption; Algorithm design and analysis; Complexity theory; Cryptography; Greedy algorithms; Hardware; Table lookup; Upper bound; Integer multiplication; double-base number system.; multiple-radix representation;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.2010.200
