DocumentCode :
1350569
Title :
Esaki Diode High-Speed Logical Circuits
Author :
Goto, E. ; Murata, K. ; Nakazawa, K. ; Nakagawa, K. ; Moto-Oka, T. ; Matsuoka, Y. ; Ishibashi, Y. ; Ishida, H. ; Soma, T. ; Wada, E.
Author_Institution :
Dept. of Physics, Faculty of Science, University of Tokyo, Tokyo, Japan.
Issue :
1
fYear :
1960
fDate :
3/1/1960 12:00:00 AM
Firstpage :
25
Lastpage :
29
Abstract :
Logical circuits using Esaki diodes, and which are based on a principle similar to parametron (subharmonic oscillator element) circuits, are described. Two diodes are used in series to form a basic element called a twin, and a binary digit is represented by the polarity of the potential induced at the middle point of the twin, which is controlled by the majority of input signals applied to the middle point. Unilateral transmission of information in circuits consisting of cascaded twins is achieved by dividing the twins into three groups and by energizing each group one after another in a cyclic manner. Experimental results with the clock frequency as high as 30 mc are reported. Also, a delay-line dynamic memory and a nondestructive memory in matrix form are discussed.
Keywords :
Circuits; Clocks; Delay; Diodes; Frequency; Laboratories; Oscillators; Physics; Silicon; Voltage;
fLanguage :
English
Journal_Title :
Electronic Computers, IRE Transactions on
Publisher :
ieee
ISSN :
0367-9950
Type :
jour
DOI :
10.1109/TEC.1960.5221600
Filename :
5221600
Link To Document :
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