DocumentCode :
1350596
Title :
A Method for the Design of Pattern Recognition Logic
Author :
Stearns, Sam D.
Author_Institution :
Sandia Corporation, Albuquerque, N. M.
Issue :
1
fYear :
1960
fDate :
3/1/1960 12:00:00 AM
Firstpage :
48
Lastpage :
53
Abstract :
The general problem of pattern recognition is regarded as a problem wherein the recognition device is presented with a plane array of black-or-white elements and must decide to which general class (pattern) this array belongs. A method for reducing the necessary amount of logic is presented. It is basically a method for reducing Boolean equations in many variables which contain large numbers of redundant or ``don´t care´´ terms. The reduced logic is in the form of Boolean functions of the black-or-white elements. Some experimental results, in which this logic was mechanized with diodes, are discussed.
Keywords :
Boolean functions; Design methodology; Equations; Image recognition; Logic arrays; Logic design; Logic devices; Logic functions; Pattern recognition; Tellurium;
fLanguage :
English
Journal_Title :
Electronic Computers, IRE Transactions on
Publisher :
ieee
ISSN :
0367-9950
Type :
jour
DOI :
10.1109/TEC.1960.5221604
Filename :
5221604
Link To Document :
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