DocumentCode
1352220
Title
On-chip timing reference for self-timed microprocessor
Author
Temple, S. ; Furber, S.B.
Author_Institution
Dept. of Comput. Sci., Manchester Univ., UK
Volume
36
Issue
11
fYear
2000
fDate
5/25/2000 12:00:00 AM
Firstpage
942
Lastpage
943
Abstract
A calibratable on-chip timing reference circuit has been developed to enable a self-timed microprocessor to interface to standard offchip memory and peripheral devices. The circuit exhibits several of the desirable properties of self-timed circuitry such as low power consumption and low electromagnetic interference (EMI). In addition, it is highly testable.
Keywords
timing circuits; AMULET processors; highly testable circuit; interfacing; low EMI; low electromagnetic interference; low power consumption; on-chip timing reference; peripheral devices; self-timed circuitry; self-timed microprocessor; standard offchip memory;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20000724
Filename
848977
Link To Document