DocumentCode
1352547
Title
Positive feedback in adiabatic logic
Author
Vetuli, A. ; Pascoli, Stefano Di ; Reyneri, L.M.
Author_Institution
Dipartimento di Ingegneria dell´´Inf., Pisa Univ., Italy
Volume
32
Issue
20
fYear
1996
fDate
9/26/1996 12:00:00 AM
Firstpage
1867
Lastpage
1869
Abstract
An adiabatic logic family is presented, which makes use of a CMOS positive feedback amplifier. The gate is based on dual rail logic and a cascade of such gates only needs three power/clock lines to operate. The positive feedback amplifier ensures high noise immunity and takes part in the energy recovery process
Keywords
CMOS logic circuits; feedback amplifiers; logic gates; CMOS positive feedback amplifier; adiabatic logic family; dual rail logic; energy recovery process; high noise immunity; logic gates;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19961272
Filename
535162
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