Title :
Parallel CRC generation
Author :
Albertengo, Guido ; Sisto, Riccardo
Author_Institution :
Electron. Dept., Politecnico di Torino, Italy
Abstract :
Theoretical aspects of encoding cyclic redundant codes (CRCs) are reviewed. A method of designing hardware parallel encoders for CRCs that is based on digital system theory and z-transforms is presented. It allows designers to derive the logic equations of the parallel encoder circuit for any generator polynomial. A few interesting application areas for hardware parallel encoders are pointed out.<>
Keywords :
digital arithmetic; encoding; digital system theory; encoding cyclic redundant codes; generator polynomial; hardware parallel encoders; logic equations; z-transforms; Backplanes; Communication system control; Cyclic redundancy check; Data communication; Digital systems; Equations; Hardware; Logic circuits; Polynomials; Shift registers;
Journal_Title :
Micro, IEEE
