Characterization and Modeling of Parasitic Field-Oxide Transistors for Use in Radiation Hardening by Design

Author

Schlenvogt, Garrett J. ; Barnaby, Hugh J. ; Rollins, Jeff D. ; Wilkinson, Jeff ; Morrison, Scott ; Tyler, Larry

Author_Institution

Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA

Volume

58

Issue

6

fYear

2011

Firstpage

2863

Lastpage

2870

Abstract

Parasitic field oxide transistors are affected by ionizing radiation, becoming active circuit elements leading to loss of device isolation. Test structures are designed, fabricated and characterized allowing analysis of parasitic device layout geometries. Accurate modeling of parasitic devices through determination of effective width/length ratios supports compact model development for use in radiation-hardening-by-design activities.

Keywords

field effect transistors; oxidation; radiation hardening (electronics); semiconductor device models; active circuit elements; compact model development; device isolation loss; effective width-length ratio determination; ionizing radiation; parasitic device layout geometry analysis; parasitic device modeling; parasitic field-oxide transistor modeling; radiation-hardening-by-design activities; Integrated circuit modeling; Leakage current; Logic gates; MOSFET circuits; Radiation effects; Radiation hardening; Transistors; Interdevice leakage; local oxidation of silicon (LOCOS); oxide trapped charge; radiation; total ionizing dose (TID);

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2011.2169427

Filename

6054044