Title :
Fault-Tolerant ICs: The Reliability of TMR Yield-Enhanced ICs
Author :
Haifley, Tim ; Bhatt, Atul
Author_Institution :
EXAR Corporation; 2150 Commerce Drive; San Jose, California 95131 USA.
fDate :
6/1/1987 12:00:00 AM
Abstract :
The use of triple modular redundancy (TMR) for reliability enhancement is well known. This paper presents a simple method´ for predicting the reliability of integrated circuits (ICs) which use TMR for yield enhancement. A simple yield-model is included as it is necessary to factor in the effect of consumption of redundancy paths due to wafer fabrication defects. TMR implementation is briefly discussed as well.
Keywords :
Application specific integrated circuits; Fabrication; Fault tolerance; Information systems; Integrated circuit modeling; Integrated circuit reliability; Integrated circuit yield; Logic; Redundancy; Very large scale integration; Defect; Majority voter; Redundancy; Triple modular redundancy;
Journal_Title :
Reliability, IEEE Transactions on
DOI :
10.1109/TR.1987.5222347
