A Method for Predicting VLSI-Device Reliability Using Series Models for Failure Mechanisms

A series model is used to determine the intrinsic reliability of an integrated circuit. An analysis of electromigration in the interconnect system of a 200 000 transistor VLSI device, shows that the failure rate exceeds 10 FIT (failures per 109 hours) within 2 years when operating at a temperature of 800 C. These results indicate the importance of fundamental wear-out mechanisms as factors in VLSI device reliability, under usual operating conditions. The analysis, as applied to a generic chip, predicts that temperature, burn-in, and complexity all adversely affect the device reliability. The paper demonstrates the feasibility of using the information available in the design database together with specific failure models to predict (during the design phase) the reliability of an IC. These techniques can be used to develop a CAD tool for reliability prediction.