Light Switched Plasma Charging Protection Device for High-Field Characterization and Flash Memory Protection

Plasma charging damage (PCD) is usually measured by comparing the measurement results of an undamaged reference structure to the results of structures, which intentionally received PCD. If wafer level reliability structures are required, these test structures, including the damage amplifying antenna, have to be small enough to fit into the scribeline. However, when these test structures, usually transistors, become smaller, it is harder to realize damage-free reference structures, since the ratio from pad antenna to gate area will increase. To avoid this effect, protection devices are commonly placed parallel to the gate of the reference transistors. However, most protection devices do not allow high-field measurement or the use of both polarities, which is important for in-depth PCD analysis. A device, which at the same time protects the test structure from PCD and also permits bipolar high-field stress to be applied to the test structure, is shown in this paper. Its usefulness is demonstrated on a realistic test structure and as a protection device for Flash memory cells.