DocumentCode :
1355315
Title :
Performance analysis of VLIW compilation techniques
Author :
Moon, S.-M. ; Park, S.
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Volume :
147
Issue :
2
fYear :
2000
fDate :
3/1/2000 12:00:00 AM
Firstpage :
117
Lastpage :
123
Abstract :
VLIW machines derive their performance advantage from the parallel execution of independent instructions that have been scheduled by the compiler. The paper evaluates the performance impact of a set of important VLIW compilation techniques on non-numerical integer programs. In particular, several key scheduling approaches, including software pipelining versus loop unrolling, DAG-based versus trace-based global scheduling, all-path versus profiled speculation, and restricted versus unrestricted speculative loads, are compared. The evaluation is performed on a uniform VLIW testbed where a relatively fair comparison of these scheduling approaches can be made. The result provides a meaningful insight into the relative benefits of each approach
Keywords :
directed graphs; parallel architectures; performance evaluation; program compilers; VLIW compilation techniques; VLIW machines; integer programs; loop unrolling; performance analysis; scheduling; software pipelining;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2387
Type :
jour
DOI :
10.1049/ip-cdt:20000186
Filename :
850611
Link To Document :
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