DocumentCode :
1355723
Title :
A Magnetic Core Parallel Adder
Author :
Chen, Mao-Chao
Author_Institution :
Physics Dept., Stanford University, Stanford, Calif.
Issue :
4
fYear :
1958
Firstpage :
262
Lastpage :
264
Abstract :
A logical design using magnetic core elements which does not have the usual carry time limitations is described. The synthesis uses a truth-table technique.
Keywords :
Adders; Boolean algebra; Concurrent computing; Diodes; Magnetic analysis; Magnetic cores; Magnetic memory; Magnetic switching; Switches; Voltage;
fLanguage :
English
Journal_Title :
Electronic Computers, IRE Transactions on
Publisher :
ieee
ISSN :
0367-9950
Type :
jour
DOI :
10.1109/TEC.1958.5222656
Filename :
5222656
Link To Document :
بازگشت