Title :
A Magnetic Core Parallel Adder
Author_Institution :
Physics Dept., Stanford University, Stanford, Calif.
Abstract :
A logical design using magnetic core elements which does not have the usual carry time limitations is described. The synthesis uses a truth-table technique.
Keywords :
Adders; Boolean algebra; Concurrent computing; Diodes; Magnetic analysis; Magnetic cores; Magnetic memory; Magnetic switching; Switches; Voltage;
Journal_Title :
Electronic Computers, IRE Transactions on
DOI :
10.1109/TEC.1958.5222656