DocumentCode :
1357838
Title :
Symbolic optimization of interacting controllers based on redundancy identification and removal
Author :
Ferrandi, Fabrizio ; Fummi, Franco ; Macii, Enrico ; Poncino, Massimo ; Sciuto, Donatella
Author_Institution :
Dipt. di Elettronica e Inf., Politecnico di Milano, Italy
Volume :
19
Issue :
7
fYear :
2000
fDate :
7/1/2000 12:00:00 AM
Firstpage :
760
Lastpage :
772
Abstract :
This paper presents a binary decision diagram (BDD)-based algorithm for the optimization of the driven machine, M2, of a finite-state machine (FSM) network with cascade connection, M1 →M2. The technique we propose relies on redundant faults identification and removal. A fault, f, located into machine M 2, is redundant with respect to the overall network if the driving machine M1 is not able to generate any test sequence for such a fault. When the state transition graph (STG) specifications of the network components are available, the standard way for checking the redundancy condition for the considered fault requires one to first construct the product machine M2×M2F , where M2F is the faulty FSM, then to connect it to the driving machine, and finally to perform reachability analysis on the composed machine M1→M2×M2F. Clearly, the size of such machine limits the applicability of the approach above to systems whose components have a few tens of states at most, even when symbolic traversal algorithms are used. Since we are interested in dealing with networks of larger FSM´s (i.e., machines whose STGs can not be represented explicitly), we propose to use the product automaton P´=A1×Af, where A1 ´ is the finite automaton (FA) accepting all the output sequences of M1, and Af is the FA accepting all the test sequences for fault f, instead of machine M1→M2 ×M2F. This simplifies sensibly the task of the reachability analysis program, since Af has considerably less states and less edges than the product machine M2 ×M2F and, thus, the size of the BDD representation of its transition relation is much more easily manageable. In addition, differently from other approaches, automaton A 1´ is not required to be deterministic and state minimal. This allows us to avoid the application of determinization and state minimization procedures whose complexity is exponential. We present experimental results For examples (i.e., network of interacting controllers) on which existing optimization methods are not applicable, due to the size of the component FSM´s. We also provide a comparison to the data produced by state-of-the-art FSM network optimizers on small benchmarks in order to show the effectiveness of our approach
Keywords :
binary decision diagrams; circuit optimisation; finite state machines; hardware description languages; high level synthesis; logic partitioning; minimisation of switching nets; reachability analysis; redundancy; symbol manipulation; binary decision diagram; cascade connection; driving machine; finite automaton; finite-state machine; interacting controllers; network optimizers; output sequences; product automaton; reachability analysis; redundancy identification; state minimization procedures; state transition graph; symbolic optimization; symbolic traversal algorithms; test sequence; transition relation; Automata; Automatic control; Automatic testing; Binary decision diagrams; Boolean functions; Data structures; Fault diagnosis; Reachability analysis; Redundancy; Size control;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.851991
Filename :
851991
Link To Document :
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