Title :
A pulse-based, parallel-element macromodel for ferroelectric capacitors
Author :
Sheikholeslami, Ali ; Gulak, P. Glenn ; Takauchi, Hideki ; Tamura, Hirotaka ; Yoshioka, Hiroshi ; Tamura, Tetsuro
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
fDate :
7/1/2000 12:00:00 AM
Abstract :
A pulse-based behavioral model is proposed and implemented in HSPICE. Hysteresis-loop and pulse measurement results are used to extract the model parameters. The model accurately predicts the bitline voltage of a ferroelectric memory testchip.
Keywords :
SPICE; dielectric hysteresis; ferroelectric capacitors; ferroelectric storage; modelling; HSPICE; bitline voltage; ferroelectric capacitors; ferroelectric memory; hysteresis-loop; parallel-element macromodel; pulse-based behavioral model; Capacitors; Circuit simulation; Ferroelectric materials; Hysteresis; Iron; Predictive models; Pulse measurements; Space vector pulse width modulation; Switches; Voltage;
Journal_Title :
Ultrasonics, Ferroelectrics, and Frequency Control, IEEE Transactions on
