Analysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices

Author

Choi, Sung-Jin ; Han, Jin-Woo ; Jang, Moongyu ; Choi, Yang-Kyu

Author_Institution

Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

30

Issue

10

fYear

2009

Firstpage

1084

Lastpage

1086

Abstract

The aim of this letter is to analyze the spatial distribution of trapped charges in the type of dopant-segregated Schottky barrier (DSSB)-embedded FinFET SONOS devices used in NAND-type flash memory. Due to localized programming by carrier injection with extra kinetic energy, the spatial distribution of electrons trapped in an O/N/O layer of a DSSB SONOS device after a short time of programming differs from that in an O/N/O layer of a conventional SONOS device, which results in the degradation of subthreshold slope (SS). Note that the degraded SS recovers as the program time increases. The measured and simulated data confirm that the high speed of the programming is due largely to the localized trapped charges injected from DSSB source/drain junctions.

Keywords

MOSFET; Schottky barriers; Schottky gate field effect transistors; charge injection; electron traps; flash memories; logic gates; semiconductor doping; DSSB source-drain junctions; NAND-type flash memory; SONOS devices; carrier injection; dopant-segregated Schottky barrier-embedded FinFET; kinetic energy; localized programming; spatial distribution; subthreshold slope degradation; trapped charges; trapped electrons; Dopant-segregated Schottky barrier (DSSB); FinFET; Flash memory; SONOS; Schottky barrier; dopant segregation; localized trapping; subthreshold slope (SS);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2009.2027724

Filename

5226563