Title :
The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier
Author :
Assaad, Rida S. ; Silva-Martinez, Jose
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
A recycling amplifier architecture based on the folded cascode transconductance amplifier is described. The proposed amplifier delivers an appreciably enhanced performance over that of the conventional folded. This is achieved by using previously idle devices in the signal path, which results in an enhanced transconductance, gain, and slew rate. Moreover, the input referred noise and offset analyses are included to demonstrate that the proposed modifications have no adverse effects on these design metrics. Transistor-level simulations and experimental results in TSMC 0.18 mum CMOS process confirm the theoretical results. When compared to the conventional folded cascode, and for the same area and power budgets, the proposed amplifier has almost twice the bandwidth (134.2 MHz versus 70.7 MHz) and better than twice the slew rate (94.1 V/mus versus 42.1 V/mus) while driving the same 5.6 pF load. Also a gain enhancement of 7.6 dB is observed.
Keywords :
CMOS integrated circuits; amplifiers; TSMC CMOS process; capacitance 5.6 pF; folded cascode transconductance amplifier; input referred noise; offset analyses; recycling amplifier architecture; recycling folded cascode amplifier; signal path; size 0.18 mum; slew rate; transistor-level simulation; Bandwidth; CMOS analog integrated circuits; CMOS process; CMOS technology; Driver circuits; Mirrors; Operational amplifiers; Power amplifiers; Recycling; Transconductance; Amplifiers; CMOS analog integrated circuits; fast operational amplifiers; low-power low-voltage integrated circuits; operational amplifiers; operational transconductance amplifiers;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2009.2024819